" sequential computers are approaching a fundamental physical
limit on their potential power. Such a limit is the speed of light "
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The back-plane power supplies are decoupled and buffers are provided for all external link communications. The 5MHz clock signal is also buffered.
The board may be used in a VME system which contains at least one IMSB014. The SMT014 is designed to allow TRAM based VME systems to be extended at minimum cost, by using transputer links alone. Alternatively, a number of SMT014s and TRAMs may be housed in a 6U rack and hosted via a remote transputer system.
The TRAM slot 0 has a subsystem port, which can be used to control the other slots, or fed with the signal from another SMT014. This is designed to allow stand alone operation, using a ROM TRAM to boot the system. Without an IMSB014, the P1 signal '--SYSRESET' can be used to reset the root TRAM.
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