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INMOS B409 Size-8 Graphics TRAM

General Description

The IMS B409 implements the timing generation and display driver parts of a medium to high performance graphics system.  It consists of three pixel channels and a programmable video timing generator (VTG), controlled by an IMS T222.  Each pixel channel consists of a 4-1 byte multiplexer and an IMS G176 color look-up table (CLUT).  Input to each pixel channel is by a separate pixel bus input and each channel generates a set of RGB outputs.  The IMS B409 supports both interlaced and non-interlaced displays of arbitrary resolution to a maximum date rate of 64MHz.  The IMS B409 may be used in conjunction with up to 12 IMS B408s.

User Manual & Support Software

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