Welcome to Ram Meenakshisundaram's Transputer Home Page

"…sequential computers are approaching a fundamental physical

limit on their potential power. Such a limit is the speed of light…"

Transtech TTM610 PowerPC TRAM


The TTM610 is constructed as a size 4 TRAM module with a PowerPC, up to 32 MBytes of main memory and T805 communications processor which has 4 Mbytes of private local memory. The two processors exchange data in shared memory, with interrupts and full bus locking to synchronize such transfers The advanced design of the memory interface on the TTM610 gives 278 Mbytes/sec memory to memory copy when using a 603eV running at 200 MHz

The TTM610 can be used just like transputer TRAMs. They are mounted on standard TRAM motherboards, and using the Transtech PowerPC development tools are integrated into transputer networks. The users in effect declare the PowerPC TRAM as a "super" transputer. The 4 transmit/receive communications links can be run simultaneously each achieving 20 Mbits/sec.

The TTM610 is available with a PowerPC 603eV or 604eV running at 200 MHz with a 66 MHz bus speed, and either 16 or 32 Mbytes of synchronous DRAM.

Using the PowerPC in TRAM format, the TTM610 allows the integration of other transputer based TRAM modules with the PowerPC.

Designed to be used in clusters, the TTM610 can be used to construct various network topologies from simple processor pipelines to complex meshes with 100s of PowerPC nodes per system. Within an array each processor can communicate with other TRAMs via one or more of the four 20Mbit/sec bi-directional links. Since each of these links allows communication directly with other TRAM modules over a twisted wire pair, both hardware and software is independent of its host carrier board.

To mount the TTM610 Transtech offers a range of TRAM carrier boards for VME, PCI, ISA and other environments. When fitted to the carrier boards the TTM610s communicate to each other directly, bypassing the host. For host to TRAM communication, one of the 20Mbit/sec links can be routed to the host interface. This provides a front end for system I/O and a means to boot application code.

User Manual & Support Software


Enquires to rmeenaks@olf.com