Welcome to Ram Meenakshisundaram's Transputer Home Page

"…sequential computers are approaching a fundamental physical

limit on their potential power. Such a limit is the speed of light…"

Transputing Without Transputers

• CSP for Java
• Michael Poole's Occam 2.1 Compiler for the PC
• Kent Retargetable Occam Compiler (KRoC)
• SPoC - The Southampton Portable Occam Compiler
• CCSP - CSP for the C programming language
• JCSP - Communicating Sequential Processes for Java

• Kevin Bertram's IMSC011 & IMSC012 Link Adapter Core in CPLD
• Andy Peter's IMST805 Transputer Address, Data & Control Bus VHDL models

• Reimplementing Transputers in FPGA (comp.arch.fpga discussion)
• Hardware for Transputing without Transputers, Walker P., WoTUG 19 :pp1-20, 1998
• Hardware Implications for Virtual Channels, particularly for the Bus Interface, Walker P., WTC, Como 1994
• Hands-on Computer Architecture - Teaching Processor and Integrated Systems Design with FPGAs, Gray J.
• Building a RISC in an FPGA - Part 1: Tools, Instruction Set, and Datapath, Gray J., Circuit Cellar, March 2000
• Building a RISC in an FPGA - Part 2: Pipeline and Control Unit Design, Gray J., Circuit Cellar, April 2000
• Building a RISC in an FPGA - Part 3: System-on-a-Chip Design, Gray J., Circuit Cellar, May 2000

• IEEE 1355 Association
• FPGA CPU Homepage
• Paul Walkers' Homepage
• DejaNews: comp.arch.fpga
• 4Links: boards, chips, IPR, consultancy, for IEEE 1355 links

Enquires to rmeenaks@olf.com