Welcome to Ram Meenakshisundaram's Transputer Home Page

"…sequential computers are approaching a fundamental physical

limit on their potential power. Such a limit is the speed of light…"

HARP-1 Reconfigurable Computer

• CPU: Any 32 bit T-series transputer with a multiplexed bus. Usually T805-25.
• Memory: 4 Mbytes of DRAM. Usually 60ns access time.
• External memory access: Usually 3 cycle access with T805-25.
• Subsystem support: present.
• FPGA: Any XC3x9x in PQ 160 package, or compatible. Usually XC3195-3,XC3195A-3, XC3090-125 or XC3090A-125.
• SRAM. Upto 128K of static ram attached to FPGA. Normally 128K, 25ns or faster installed.
• Custom PLL Frequency synthesizer: up to 100MHz (oscilloscope display at 96MHz).  Normally 2MHz to 90MHz.
• Size 6 (HARP1), or size 4 ( SMT219, HARP2 ) TRAM. HARP1:active slot in 3rd position. HARP2: active slot in first position.
• Power. Approximately 5 watts quiescent. Maximum 20 watts. Typical maximum 9 W. ( Usually less than 1.8A at 5V.)
• External connections: 4 transputer links and a ribbon cable connector ( ).
• 34--way ribbon cable connector. 17 signals interleaved with ground lines ( ).

The HARP boards are TRAM circuits carrying a T--series transputer with 4 Mbytes of external DRAM closely coupled to programmable hardware in the form of an FPGA (Field Programmable Gate array). A bank of fast SRAM and a high performance frequency synthesizer is also included. Communication resources beyond the 4 transputer links are provided: connectors provide further fully programmable signals.

All the resources are controlled by the transputer. The FPGA may be used as a co--processor, dynamically re--programmed from the transputer. Or there may be a single configuration loaded at boot time. The boards may be used alone, or as part of parallel arrays.

The HARP boards were designed primarily to explore the compilation of the Occam and Ruby languages directly into hardware, but the FPGA may be also be programmed by standard commercial tools.

The closely coupled pair of processors provides a powerful computational resource, particularly for algorithms do not "fit'' a traditional microprocessor architecture. Systolic arrays, for example, can be efficiently implemented on an FPGA.

HARPs can be used as development platforms for FPGA applications, and so are also useful in education and familiarization with the technology. The flexibility inherent in the almost completely programmable nature of the boards allows them be used to explore hardware options. Where volume does not justify the manufacture of a custom design, they can be used directly. Both boards have external connectors which are useful in this context, although these are also intended to permit high bandwidth communication beyond the facilities provided by the transputer links.

More routine applications are as a "custom'' interface to unusual hardware, or where a single piece of equipment needs to be re--programmed to suit different hardware standards. By using the on--board frequency synthesizer, and programming the FPGA to pass the signals through to the external connector, they can even be used as a signal generator.

HARPs can be populated with a variety of different transputers, FPGAs and RAM speeds. A fairly high specification is a T805-25 transputer, a Xilinx XC3195A FPGA, and 128K bank of 20ns static RAM.

The original design was HARP1 which is a fully professional size 6 TRAM. A slightly enhanced design is SMT219 HARP-2 which is available commercially from Sundance: that is a size 4 TRAM.

• Sundance SMT219 FPGA Harp-2 Size-4 TRAM
• The Official Harp-1 Reconfigurable Computer Home Page

• HARP Manual Volume 1 - User Manual for HARP-1 and HARP-2

Enquires to rmeenaks@olf.com