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Alpha Data ADH-HTRAM module with T9000 and Alpha AXP processors

Features
Description

The ADH-HTRAM is a size 4 HTRAM module including both an Alpha AXP and a T9000 processor. The two processors are interfaced over the on-board PCI bus for maximum inter-processor communication bandwidth. This compact unit offers superb processing performance along with access to T9000 link technology, making it a powerful building block for a parallel processing system. This module enhances existing T9000 systems with the huge floating point power of Alpha processors. Parallel compilers for the ADH-HTRAM are available from 3L.

Specifications
Processor DEC Alpha 21066 fully-pipelined 64-bit RISC architecture
  • 233MHz (466 mips, 233MFLOPS) using dual instruction issue
  • IEEE and VAX-compatible floating point
  • High bandwidth 64-bit memory controller
  • Memory management
  • 8k on-chip data and instruction caches
  • Secondary cache controller
  • Asynchronous PCI I/O controller
  • Intel compatible PCI bus

INMOS T9000

  • Running at 25MHz
  • Supporting Virtual Channel Routing (VCR)
  • Includes 4 DS links based on the IEEE P1355 standard
Memory DEC Alpha
  • 8MB to 32MB of 70ns DRAM
  • 256K to 1MB 15ns external cache SRAM

INMOS T9000

  • 128KB of local SRAM
Host interface Connected to an HTRAM carrier board
Software 3L Parallel C/AXP compiler with parallel network support
  • (including DEC GEM compiler).
  • IPLib and fast maths libraries

INMOS T9000 toolset for the T9000

Warranty 12 months from date of invoice

 

User Manual & Support Software

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